#ifndef __RK3288_REG_PMU_H__
#define __RK3288_REG_PMU_H__

#define RK3288_PMU_BASE			(0xff730000)

#define PMU_WAKEUP_CFG0			(0x00)
#define PMU_WAKEUP_CFG1			(0x04)
#define PMU_PWRDN_CON			(0x08)
#define PMU_PWRDN_ST			(0x0c)
#define PMU_IDLE_REQ			(0x10)
#define PMU_IDLE_ST				(0x14)
#define PMU_PWRMODE_CON			(0x18)
#define PMU_PWR_STATE			(0x1c)
#define PMU_OSC_CNT				(0x20)
#define PMU_PLL_CNT				(0x24)
#define PMU_STABL_CNT			(0x28)
#define PMU_DDR0IO_PWRON_CNT	(0x2c)
#define PMU_DDR1IO_PWRON_CNT	(0x30)
#define PMU_CORE_PWRDWN_CNT		(0x34)
#define PMU_CORE_PWRUP_CNT		(0x38)
#define PMU_GPU_PWRDWN_CNT		(0x3c)
#define PMU_GPU_PWRUP_CNT		(0x40)
#define PMU_WAKEUP_RST_CLR_CNT	(0x44)
#define PMU_SFT_CON				(0x48)
#define PMU_DDR_SREF_ST			(0x4c)
#define PMU_INT_CON				(0x50)
#define PMU_INT_ST				(0x54)
#define PMU_BOOT_ADDR_SEL		(0x58)
#define PMU_GRF_CON				(0x5c)
#define PMU_GPIO_SR				(0x60)
#define PMU_GPIO0A_PULL			(0x64)
#define PMU_GPIO0B_PULL			(0x68)
#define PMU_GPIO0C_PULL			(0x6c)
#define PMU_GPIO0A_DRV			(0x70)
#define PMU_GPIO0B_DRV			(0x74)
#define PMU_GPIO0C_DRV			(0x78)
#define PMU_GPIO_OP				(0x7c)
#define PMU_GPIO0_SEL18			(0x80)
#define PMU_GPIO0A_IOMUX		(0x84)
#define PMU_GPIO0B_IOMUX		(0x88)
#define PMU_GPIO0C_IOMUX		(0x8c)
#define PMU_GPIO0D_IOMUX		(0x90)
#define PMU_SYS_REG0			(0x94)
#define PMU_SYS_REG1			(0x98)
#define PMU_SYS_REG2			(0x9c)
#define PMU_SYS_REG3			(0xa0)

#endif /* __RK3288_REG_PMU_H__ */
